1. Field of the Invention
The present invention relates to a liquid crystal panel used as a display device for computers, word processors, and TV sets, and a method for repairing a defect arising in the liquid crystal panel.
2. Description of the Related Art
In recent years, flat display panels using liquid crystal and the like as a display medium has become popular as display devices for computers, word processors, and TV sets. In particular, an active matrix liquid crystal panel having switching elements such as thin film transistors for respective pixels to drive the pixels individually is used as a display device which requires a high resolution such as VGA, S-VGA, and XGA and includes a huge number of pixels for display.
Such an active matrix liquid crystal panel has a pair of substrates sandwiching a liquid crystal layer therebetween. One of the pair of substrates is provided with switching elements (hereinafter, referred to as an active matrix substrate) and includes an insulating substrate, scanning lines and signal lines formed on the insulating substrate to cross each other, switching elements formed in the vicinity of the respective crossings of the scanning lines and the signal lines, and pixel electrodes formed in a matrix and connected to the respective switching elements. The other substrate (hereinafter referred to as a counter substrate) includes a counter electrode.
FIG. 17 is an equivalent circuit diagram of a conventional active matrix substrate. FIG. 18 is a partial enlarged view of FIG. 17.
Referring to FIGS. 17 and 18, the active matrix substrate includes scanning lines 401, scanning line terminals 401a, signal lines 402, signal line terminals 402a, common lines 403, common line terminals 403a, thin film transistors (TFTs) 404, and pixel electrodes 405 which are all formed on a surface of an insulating substrate made of glass, for example. The scanning lines 401 and the signal lines 402 are arranged to cross each other with an insulating film (not shown) therebetween. The TFTs 404 are formed at the respective crossings of the scanning lines 401 and the signal lines 402 as switching elements. A gate electrode 406 and a source electrode 407 of each TFT 404 are connected to the corresponding scanning line 401 and signal line 402, respectively. A drain electrode 408 of each TFT 404 is connected to the corresponding pixel electrode 405.
FIG. 19 is a sectional view of the TFT 404 which is formed on the insulating substrate 420 as described above. The gate electrode 406 which is connected to the scanning line 401 is formed on the insulating substrate 420, and is covered with a gate insulating film 422. A silicon semiconductor layer 423 is formed on the gate insulating film 422, and an etching stopper 424 is formed on the center portion of the silicon semiconductor layer 423 as a channel protection layer. A first n.sup.+ -Si layer 425 and the second n.sup.+ -Si layer 426 are formed separately to overlap the etching stopper 424. The first n.sup.+ -Si layer 425 and a second n.sup.+ -Si layer 426 are electrically connected to the source electrode 407 and the drain electrode 408, respectively.
The active matrix substrate with the above configuration is laminated together with a counter substrate (not shown), interposing a liquid crystal layer therebetween. A pixel capacitor 411 is then formed between the pixel electrode 405 and a counter electrode of the counter substrate. As shown in FIGS. 17 and 18, the common lines 403 are formed to run in parallel with the scanning lines 401 and cross the signal lines 402 via the gate insulating film 422. All of the common lines 403 are short-circuited via the common line terminals 403a. A storage capacitor 412 is formed between each pixel electrode 405 and the corresponding common line 403.
The scanning lines 401, the signal lines 402, and the common lines 403 may be disconnected due to pinholes generated during the fabrication process and dust and the like attaching to the lines during the fabrication process. When a line is disconnected, a pixel electrode connected to the disconnected line is not supplied with a driving signal, causing display failure. This line disconnection arises with higher probability in a high-precision active matrix liquid crystal panel, since the scanning lines 401 and the signal lines 402 need to be very fine. To repair this display failure due to a disconnection, the conventional active matrix substrate includes redundant lines 409 formed outside the area where the scanning lines 401, the signal lines 402, and the common lines 409 are formed. In FIG. 17, for example, two redundant lines 409 are formed to run in parallel with the scanning lines 401 and cross the signal lines 402 via the gate insulating film 422. Redundant line terminals 409a are formed on the both ends of the redundant lines 409.
In general, in the fabrication process of the liquid crystal panel, the following problems occur. As shown in FIG. 20, when a switching failure 410 or a leakage occurs in one TFT 404, the pixel electrode connected to the TFT 404 is not supplied with a proper driving signal. As a result, the pixel fails in effecting normal display, causing a so-called point defect. Also, as shown in FIG. 21, when a disconnection 430 arises at one signal line 402, all the pixels connected to the signal line 402 fail in effecting normal display, causing a so-called line defect.
The point defect due to the failure 410 in the TFT 404 is generally repaired so that it becomes inconspicuous when the panel is actually driven with drivers mounted thereto to display an image. As a method for repairing a point defect, there is proposed a method of directly connecting the pixel electrode to the corresponding signal line as is disclosed in Japanese Patent Publication No. 7-122719. According to this method, the point defect is repaired using the corresponding TFT 404 in the following manner. The gate electrode of the TFT 404 and the corresponding scanning line 401 are cut apart from each other by irradiating the connecting portion thereof with an energy beam such as a laser beam. Also, the overlap portion of the source electrode and the gate electrode of the TFT 404 and the overlap portion of the gate electrode and the drain electrode of the TFT 404 are irradiated with an energy beam such as a laser beam to penetrate the interposing insulating film at the overlap portions. This allows the source electrode and the gate electrode and the drain electrode and the gate electrode to be electrically connected, thus directly connecting the pixel electrode 405 to the signal line 402.
The above repair method, however, lowers the aperture ratio. The reason is that, in order to facilitate the laser cutting, a laser cut portion 422, which is narrower than the gate electrode 406, needs to be formed between the gate electrode 406 and the scanning line 401 as shown in FIG. 18. This necessitates lengthening the distance between the TFT 404 and the scanning line 401 to some extent, reducing the area of the pixel electrode 405 and thus lowering the aperture ratio.
The line defect due to the disconnection 430 of the signal line 402 is repaired using the corresponding redundant line 409 as described above. First, the crossings of the signal line 402 having the disconnection 430 and the redundant lines 409 via the insulating film (not shown), shown as portions 415 in FIG. 21, are irradiated with a laser beam or the like. This allows the signal line 402 and the redundant lines 409 to be electrically connected. Then, the redundant line terminal 409a on one end of one of the redundant lines 409 is connected to the signal line terminal 402a on one end of the signal line 402 via a jumper line. Thus, the line defect is repaired.
However, the space to be allocated for forming the redundant lines 409 is not large; therefore the number of redundant lines is limited. Accordingly, when a plurality of signal lines 402 are disconnected, the required number of redundant lines 409 becomes small. In such a case, the line defect repair by the above method is difficult.
Referring to FIGS. 22A, 22B, and 23, the POP-structure active matrix substrate will be described.
FIG. 22A is a partial plan view of a conventional POP-structure active matrix liquid crystal panel. FIG. 22B is a sectional view taken along line H-H' of FIG. 22A.
The active matrix substrate includes an insulating substrate 520 on which scanning lines 501 and signal lines 502 are formed to cross each other. A region surrounded by two adjacent scanning lines 501 and two adjacent signal lines 502 constitutes a pixel. FIGS. 22A and 22B illustrate the region corresponding to one pixel.
TFTs 504 are formed in the vicinity of the respective crossings of the scanning lines 501 and the signal lines 502. A gate electrode 530 of each TFT 504 is composed of a branch of the corresponding scanning line 501, while a source electrode 531 of each TFT 504 is composed of a branch of the corresponding signal line 502. A common line 503a is formed to run in parallel with the scanning line 501 and cross the signal line 502 as one of two electrodes forming a storage capacitor.
The scanning line 501 and the common line 503a are covered with an insulating film 513 as shown in FIG. 22B. The signal line 502 and an electrode 503b, as the other electrode forming the storage capacitor, are formed on the insulating film 513. The scanning line 501 and the common line 503 are therefore isolated from the signal line 502 at the respective crossings with the signal line 502. An insulating film 521 is formed on the insulating film 513, covering the signal line 502 and the electrode 503b, and a pixel electrode 505 is formed on the insulating film 521. Contact holes 523 and 526 are formed through the insulating film 521. The pixel electrode 505 is connected to the electrode 503b via the contact hole 523 and to the drain electrode 532 of the TFT 504 via the contact hole 526. An alignment film 516 is formed over the entire surface of the substrate 520 covering the pixel electrode 505.
The counter substrate includes a substrate 522 on which a color filter 518, a counter electrode 517, and an alignment film 516 are formed. The counter substrate and the above-described active matrix substrate are laminated together so that the counter electrode 517 and the pixel electrodes 505 face each other. A liquid crystal material is injected in a space between the counter substrate and the active matrix substrate to form a liquid crystal layer 519. Thus, the POP-structure active matrix liquid crystal panel is fabricated.
In the POP structure, the pixel electrodes 505 overlap the scanning lines 501 and the signal lines 502. This increases the aperture ratio of the resultant liquid crystal panel.
In the POP-structure active matrix liquid crystal panel shown in FIGS. 22A and 22B, a point defect can be repaired by directly connecting the pixel electrode 505 to the signal line 502 as described above.
When a branch of the scanning line 501 is used as the gate electrode of the TFT 504, the aperture ratio decreases by the area shown as a region 528 in FIG. 23. The reason is as follows: If a channel region of the TFT 504 used as a switching element is irradiated with light, the photosensitivity of the TFT 504 affects the display characteristic of the resultant panel. In order to avoid this trouble, a light-shading portion, substantially corresponding to the region 528, is formed on the counter substrate to protect the TFT 504 from being directly irradiated with light. The aperture ratio of the resultant display device is thus decreased. This decrease in the aperture ratio is a critical disadvantage at the present time when an increase in the aperture ratio by even 1% is important.
Moreover, the pixel electrode 505 overlaps the signal line 502 via the thick insulating film 521 as described above. Accordingly, when a short-circuit occurs at a crossing of a signal line 502 and a scanning line 501 or a common line 503a, it is difficult to cut the signal line 502 at two positions located opposite the portion where the short-circuit occurs. Therefore, the above-described method for repairing a line defect is not applicable for the POP-structure liquid crystal panel.